Sweden. 2nd - 4th September 1996

Full Synopsis, Editors and Sponsors are not available for this conference.

Browse the papers below.

Improving Hardware Designs Whilst Simplifying their Proof
P. Curzon & I. Leslie

An Integrated Approach to Verifying Large Circuits: A Case Study
S. Hazelhurst & C-J. Seger

Deriving Two-Phase Modules for a Multi-Target Hardware Compiler
J. He, G. Brown, W. Luk & J. O'Leary

A Symbolic Modelling Approach for the Formal Verification of Integrated Mixed-Mode Systems
S. Hendricx & L. Claesen

A Dynamic Hardware Generation Mechanism
J. Hogg

Specifying and Property Checking the AMULET1 Address Interface
Y. Liu & G. Birtwistle

Serialising Heterogeneous and Non-Factorisable Processor Arrays
W. Luk, F. Mang & C.S. Ng

Ternary Simulation: A Refinement of Binary Functions or an Abstraction of Real-Time Behaviour?
M. Mendler & M. Fairtlough

Verification of an Optimized Fault-Tolerant Clock Synchronization Circuit
P.S. Miner & S.D. Johnson

Proving Newtonian Arbiters Correct, Almost Surely
I. Mitchell & M.R. Greenstreet

Ensuring Correctness of Ruby Transformations
O. Rasmussen

Evaluating Possibilities for Formally Sound Simulation and Verification of VHDL
R. Reetz & T. Kropf

Design Rules and Abstractions (From Branching and Real Time)
P. Sewell